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W631GG6MB-09
- Manufacturer No:
- W631GG6MB-09
- Manufacture:
- Winbond Electronics
- Datasheet:
- W631GG6MB-09
- Description:
- IC SDRAM 1GB X16 1066MHZ 96WBGA
In Stock
3720 pcs On sales
Purchase and inquiry
Purchase
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Means of Payment
For your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and wire transfer.RFQ (Request for Quotations)
It is recommended to request for quotations to get the latest prices and inventories about the part. Our sales will reply to your request by email within 24 hours.IMPORTANT NOTICE
1. You'll receive an order information email in your inbox. (Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.
Shipping Cost
Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.) The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.Shipping Method
Currently, our products are shipped through DHL, FedEx, SF, and UPS.Delivery Time
Once the goods are shipped, estimated delivery time depends on the shipping methods you chose: FedEx International, 5-7 business days. The following are some common countries' logistic time.Product Attribute
Winbond Electronics W631GG6MB-09 technical specifications, attributes, parameters and parts with similar specifications to Winbond Electronics W631GG6MB-09.
- Categories
- Integrated Circuits (ICs)
- Features
- SDRAM - DDR3 Memory IC 1Gb (64M x 16) SSTL_15 1.066 GHz 20 ns 96-VFBGA (7.5x13)
- Manufacturer
- Winbond Electronics
- Package
- Tray
- Operating Temperature Range
- 0°C ~ 95°C (TC)
- Mounting
- Surface Mount
- Case / Package
- 96-VFBGA (7.5x13)
- MSL Level
- 3 (168 Hours)
- Quantity per package
- 198
- Fake Threat In the Open Market
- 30 pct.
- Popularity
- High
- Supply and Demand Status
- Balance
Company Profile
W631GG6MB-09 Relevant information
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Double Data Rate architecture: two data transfers per clock cycle